DocumentCode
1812378
Title
A low-power subscriber line interface circuit in a high-voltage CMOS technology
Author
Vahidfar, M. ; Tajalli, Armin ; Atarodi, Mojtaba
Author_Institution
Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran
Volume
5
fYear
2002
fDate
2002
Abstract
A low-power CMOS Subscriber Line Interface Circuit (SLIC) in a 1 μm high voltage technology is presented. A systematic approach to extract the necessary specification for each block to achieve stability, accuracy, and other desired SLIC characteristics is applied. For this purpose a proper sense and feed system is introduced. The proposed SLIC shows a longitudinal balance of 53.7 dB while consumes 2.5 mA current with 16 mm2 area. This transformer-less SLIC met transmission specifications without trimming.
Keywords
CMOS integrated circuits; circuit stability; low-power electronics; subscriber loops; 1 micron; 2.5 mA; HV CMOS technology; SLIC characteristics; feed system; low-power CMOS SLIC; sense system; stability; subscriber line interface circuit; transformer-less SLIC; transmission specifications; CMOS technology; Central office; Circuit stability; Data communication; Equations; Feeds; Impedance; Integrated circuit technology; Output feedback; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010727
Filename
1010727
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