Title :
20-Gb/s 1:2 demultiplexer in 0.18-μm CMOS
Author :
Zhang, Chang-Chun ; Wang, Zhi-Gong
Author_Institution :
Inst. of RF- & OE-ICs, Southeast Univ., Nanjing
Abstract :
1:2 demultiplexer (DEMUX) was designed in a standard 0.18-mum CMOS process. A conventional current-mode-logic (CML) latch was improved to realize the core of the DEMUX for a better waveform. The results show that this DEMUX can operate at the data rate of 20 Gb/s. Under a 1.8-V supply, the whole circuit consumes 78 mA, in which the core circuit accounts for about 28%.
Keywords :
CMOS integrated circuits; CMOS logic circuits; current-mode logic; demultiplexing equipment; CMOS process; bit rate 20 Gbit/s; current-mode-logic latch; demultiplexer; size 0.18 mum; voltage 1.8 V; CMOS process; CMOS technology; Circuit synthesis; Clocks; Energy consumption; Flip-flops; Latches; Optical buffering; Optical device fabrication; Voltage;
Conference_Titel :
Microwave and Millimeter Wave Technology, 2008. ICMMT 2008. International Conference on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-1879-4
Electronic_ISBN :
978-1-4244-1880-0
DOI :
10.1109/ICMMT.2008.4540710
