DocumentCode :
1812487
Title :
Extracting multi-thread with data localities for vector computers
Author :
Sheu, Jang-Ping ; Chang, Chih-Yung
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Central Univ., Chung-Li, Taiwan
fYear :
1994
fDate :
19-22 Dec 1994
Firstpage :
466
Lastpage :
473
Abstract :
In this paper, we propose a source-to-source compilation strategy to partition vectorized loop programs into multithread execution form. Each partitioned thread consists of instances of statements with localities in vector registers. The multi-threading scheme gives a novel combination of loop unrolling, statement instances reordering, index shifting, vector register reuse exploiting, and multi-threading. Experimental results show that our multithreading scheme assists vector compiler of Convex C38 series to reduce the number of memory accesses and the number of synchronizations among CPUs and usually obtains a better performance
Keywords :
parallel programming; program compilers; software performance evaluation; synchronisation; vector processor systems; Convex C38 series; data localities; index shifting; loop unrolling; multithread execution; performance; source-to-source compilation strategy; statement instances reordering; vector computers; vector register reuse exploiting; vectorized loop programs; Computer science; Concurrent computing; Data engineering; Data mining; Memory management; Optimizing compilers; Parallel processing; Program processors; Registers; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Systems, 1994. International Conference on
Conference_Location :
Hsinchu
Print_ISBN :
0-8186-6555-6
Type :
conf
DOI :
10.1109/ICPADS.1994.590357
Filename :
590357
Link To Document :
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