Title :
An overview of design techniques for CMOS phase detectors
Author :
Soliman, S. ; Yuan, F. ; Raahemifar, K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, Ont., Canada
Abstract :
An overview of the recent developments in the design techniques of CMOS phase detectors and an in-depth examination of the advantages and limitations of these techniques are presented. Both linear and nonlinear phase detectors are examined. Critical design issues, such as, sampling mechanism, lock condition, sensitivity to input data pattern, and reliability are investigated in detail.
Keywords :
CMOS digital integrated circuits; integrated circuit reliability; phase detectors; synchronisation; timing; CDR circuits; CMOS phase detectors; clock and data recovery circuits; design techniques; input data pattern; linear phase detectors; lock condition; nonlinear phase detectors; reliability; sampling mechanism; timing information; CMOS technology; Circuits; Clocks; Data mining; Detectors; Digital systems; Jitter; Latches; Phase detection; Voltage-controlled oscillators;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010739
