Integration aspects for damascene copper interconnect in low k dielectric

Author

Blaschke, Volker ; Bersuker, Gennadi ; Muralidhar, Ramachandran ; Breen, Mark ; Mikkola, Bob ; Mucha, Jay ; Fowler, Burt ; Marsden, Mary ; Wang, Anthony ; Dempsey, Shayne ; Schmidt, Anne ; Monnig, Ken

Author_Institution

Sematech, Austin, TX, USA

fYear

1998

fDate

1-3 Jun 1998

Firstpage

154

Lastpage

156

Abstract

Some of the process integration challenges for damascene copper interconnect wiring in low k dielectrics are discussed. Electrical and failure analysis data collected on metal 1 test structures allows us to identify potential integration issues with intralevel leakage, line resistance variation, line width measurement and CMP process uniformity

Keywords

chemical mechanical polishing; copper; dielectric thin films; electric resistance; failure analysis; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit testing; leakage currents; CMP process uniformity; Cu; damascene copper interconnect wiring; damascene copper interconnects; electrical analysis; failure analysis; intralevel leakage; line resistance variation; line width measurement; low k dielectrics; metal 1 test structures; process integration; Conductivity; Copper; Dielectric thin films; Dielectrics and electrical insulation; Electric resistance; Etching; Metal-insulator structures; Plasma measurements; Slurries; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-4285-2

Type

conf

DOI

10.1109/IITC.1998.704777

Filename

704777