Grouping array layouts to reduce communication and improve locality of parallel programs

Author

Shih, Tien-Pao ; Davidson, Edward S.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

fYear

1994

fDate

19-22 Dec 1994

Firstpage

558

Lastpage

566

Abstract

A data layout method, array grouping, is proposed to improve communication efficiency and cache utilization of parallel programs containing indirect array references or nonunit stride indexing. Conditions on where to apply this technique are specified in a series of theorems. The technique is then applied to a real finite element application. The experimental results show that communication is reduced by 15%, and data subcache misses by 40% on 56 processors of the KSR1 parallel computer

Keywords

cache storage; concurrency control; parallel programming; KSR1 parallel computer; array grouping; cache utilization; communication efficiency; data layout method; data subcache misses; finite element application; indirect array references; locality; nonunit stride indexing; parallel programs; Application software; Concurrent computing; Context modeling; Data structures; Degradation; Finite element methods; Indexing; Multiprocessing systems; Pollution; Scalability;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel and Distributed Systems, 1994. International Conference on

Conference_Location

Hsinchu

Print_ISBN

0-8186-6555-6

Type

conf

DOI

10.1109/ICPADS.1994.590375

Filename

590375

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1812855