DocumentCode :
1813368
Title :
CCT: a new VLSI architecture for parallel processing
Author :
Basu, S.K. ; Dattagupta, J. ; Dattagupta, R.
Author_Institution :
Banaras Hindu Univ., Varanasi, India
fYear :
1994
fDate :
19-22 Dec 1994
Firstpage :
698
Lastpage :
702
Abstract :
We propose a VLSI implementable architecture called Cube Connected Tree having advantages of both trees and hypercubes. This structure has fixed low degree nodes for any size of network, unlike hypercubes, where the node degree is dependent on the size of the hypercube. Complexity of VLSI layout of this structure has been addressed within the grid model of C.D. Thompson (1984). By using spare links and PE´s, fault-tolerance capabilities of the system has been enhanced. Easy programmability of this structure has been demonstrated by designing polyalgorithmic algorithms for sorting and discrete Fourier transform
Keywords :
VLSI; computational complexity; hypercube networks; parallel architectures; parallel processing; trees (mathematics); CCT; Cube Connected Tree; PEs; VLSI implementable architecture; complexity; discrete Fourier transform; fault-tolerance capabilities; grid model; node degree; parallel processing; polyalgorithmic algorithms; programmability; sorting; spare links; Algorithm design and analysis; Binary trees; Fault tolerance; Fault tolerant systems; Hypercubes; Parallel processing; Radiofrequency interference; Sorting; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Systems, 1994. International Conference on
Conference_Location :
Hsinchu
Print_ISBN :
0-8186-6555-6
Type :
conf
DOI :
10.1109/ICPADS.1994.590444
Filename :
590444
Link To Document :
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