DocumentCode :
181338
Title :
Behavior modeling for whole-chip HV ESD protection circuits
Author :
Li Wang ; Rui Ma ; Chen Zhang ; Zongyu Dong ; Fei Lu ; Wang, Aiping
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Riverside, Riverside, CA, USA
fYear :
2014
fDate :
15-19 June 2014
Firstpage :
182
Lastpage :
184
Abstract :
This paper reports a new behavioral modeling technique for HV diode and silicon controlled rectifier (SCR) based electrostatic discharge (ESD) protection structures using Verilog-A language. Accurate models were developed for various HV ESD diode and stacked SCR power clamp implemented in a foundry BCD30V process, which were validated by circuit simulation and ESD measurement.
Keywords :
clamps; electrostatic discharge; thyristors; ESD measurement; HV ESD diode; SCR-based electrostatic discharge protection structure; Verilog-A language; behavioral modeling technique; circuit simulation; foundry BCD30V process; silicon-controlled rectifier; stacked SCR power clamp; voltage 30 V; whole-chip HV ESD protection circuit; Circuit simulation; Clamps; Electrostatic discharges; Integrated circuit modeling; Solid modeling; Testing; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location :
Waikoloa, HI
ISSN :
1943-653X
Print_ISBN :
978-1-4799-2917-7
Type :
conf
DOI :
10.1109/ISPSD.2014.6856006
Filename :
6856006
Link To Document :
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