DocumentCode
181340
Title
Failure analysis and optimization for synchronous rectifier Lateral DMOS transistor in DC-DC buck converter
Author
Siyang Liu ; Bing Yu ; Weifeng Sun ; Jing Zhu ; Chunwei Zhang ; Haisong Li ; Yangbo Yi ; Wei Su ; Kui Xiao ; Guipeng Sun
Author_Institution
Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China
fYear
2014
fDate
15-19 June 2014
Firstpage
185
Lastpage
188
Abstract
In this work, a new failure mechanism for the multifinger synchronous rectifier Lateral DMOS (LDMOS) in an 18V-to-5V DC-DC buck converter under overload current condition has been presented. An optimization structure based on the failure mechanism is also proposed to improve the rated load current of the converter. The novel LDMOS makes the rated load current of the DC-DC converter increase by 17%.
Keywords
DC-DC power convertors; MOS integrated circuits; failure analysis; rectifiers; DC-DC buck converter; LDMOS; failure analysis; lateral DMOS transistor; multifinger synchronous rectifier; overload current; voltage 18 V to 5 V; Failure analysis; Integrated circuits; MOSFET; Optimization; Power semiconductor devices; Rectifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location
Waikoloa, HI
ISSN
1943-653X
Print_ISBN
978-1-4799-2917-7
Type
conf
DOI
10.1109/ISPSD.2014.6856007
Filename
6856007
Link To Document