DocumentCode :
1813458
Title :
A 1 GHz linearized CMOS track-and-hold circuit
Author :
Jakonis, Darius ; Svensson, Christer
Author_Institution :
Dept. of Electr. Eng., Linkoping Univ., Sweden
Volume :
5
fYear :
2002
fDate :
2002
Abstract :
A simple solution for linearization of the MOS sampling switch is proposed. It improves the SFDR of a T/H circuit and is suitable for high-speed applications. Sampling at a constant gate-source voltage minimizes sampling errors due to variable MOS sampling switch ON-conductance and channel charge injection, and also eliminates input-dependent sampling instant variation. The proposed linearized T/H circuit is fabricated in a 0.35-μm CMOS process. Test measurements show the sampling of a 1 GHz signal.
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; high-speed integrated circuits; linearisation techniques; sample and hold circuits; signal sampling; 0.35 micron; 1 GHz; 1 GHz linearized CMOS track-and-hold circuit; 1 GHz signal sampling; MOS sampling switch; SFDR; channel charge injection; constant gate-source voltage sampling; high-speed applications; input-dependent sampling instant variation; linearization; sampling error minimization; spurious free dynamic range; variable MOS sampling switch ON-conductance; Base stations; Circuits; Frequency; MOS devices; MOSFETs; Receivers; Sampling methods; Signal sampling; Switches; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1010769
Filename :
1010769
Link To Document :
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