Title :
A framework for fault-tolerant microarchitecture synthesis
Author :
Karri, Ramesh ; Orailoglu, Alex
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
Abstract :
It is shown how different fault-tolerance requirements can be incorporated into high-level synthesis. A framework that subsumes algorithms for synthesizing self-recovering, fault-secure, and reliable microarchitectures is presented. The framework can be used to synthesize a specific fault-tolerant microarchitecture by specifying the appropriate constraints and then invoking the corresponding synthesis subsystem
Keywords :
high level synthesis; VLSI system; constraints; data flow graph; fault-secure; fault-tolerant microarchitecture synthesis; high-level synthesis; reliable microarchitectures; scheduling problem; self-recovering; synthesis subsystem; Circuit faults; Circuit synthesis; Fault detection; Fault tolerance; Fault tolerant systems; Hardware; High level synthesis; Microarchitecture; Mission critical systems; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
DOI :
10.1109/CICC.1993.590570
