Mixed-level circuit and device simulation on a distributed-memory multicomputer

Three forms of parallelism available in mixed-level circuit and device simulation are examined: job-level, circuit-level, and device-level parallelism. Of these, parallel model evaluation at the circuit-level has been determined to be the most appropriate for use in a point tool running on present-day parallel processing architectures. An implementation on a distributed-memory multicomputer of parallel model evaluation at the circuit-level is described and evaluated. A speedup of 11.5 on 16 processors has been achieved. However, several factors limit the achievable performance in this approach, the most important of which is often a lack of inherent parallelism in the method