Design of directory based cache coherence protocol verification logic in CMPs around TACA

The conventional test schemes for Chip Multiprocessors (CMPs) are costly, time consuming and power hungry. This demands search for new test methodologies. In this work, we employ cellular automata (CA) to develop a high speed protocol verification logic for CMPs realizing directory based cache coherence system. A special class of CA referred to as single length cycle 2-attractor cellular automata (TACA), has been introduced to identify the inconsistencies in cache line states of processors private caches. The TACA theory is developed to realize low cost hardware of the design enabling quick decision on the cache coherency that is desirable for the CMPs.