DocumentCode :
1815063
Title :
Accelerators in scientific computing is it worth the effort?
Author :
Heinecke, Alexander
Author_Institution :
Inst. fur Inf., Tech. Univ. Munchen, Garching, Germany
fYear :
2013
fDate :
1-5 July 2013
Firstpage :
504
Lastpage :
504
Abstract :
Today´s scientific compute facilities need to satisfy a steadily increasing computational demand by the applications they run. For the future, experts expect heterogeneous architectures with moderate amounts of “fat” cores and a large number of accelerators or coprocessors. Today, Graphic Processing Units (GPU) are very popular for accelerating highly parallel kernels like dense linear algebra or Monte Carlo simulations. However, the performance increase is not for free and requires the ability to rewrite compute kernels in GPU-specific languages such as CUDA or OpenCL. This implies serious porting and tuning effort for legacy compute-intensive applications (CPU-optimized codes), which are executed in thousands of compute centers every day. On the other hand there is Intel Xeon Phi which is a massively parallel coprocessor based on Intel Architecture (IA). The existing tool chain for software development on IA can be used to implement applications for the Xeon Phi. All traditional HPC programming models such as OpenMP and MPI on top of C/C++ and Fortran will be available. Developers do not need to accept the high learning curve and implementation effort to (partially) rewrite their source code to retrofit it for a GPU-based accelerator. In this talk, we will compare the recently released Intel Xeon Phi coprocessor, which is the first device that implements Intel´s Many Integrated Core Architecture (Intel MIC Architecture), NVIDIA Tesla GPU-based accelerators and AMD workstation GPUs as well.
Keywords :
C++ language; FORTRAN; application program interfaces; data mining; graphics processing units; message passing; natural sciences computing; parallel architectures; AMD workstation GPU; C-C++; CUDA; Fortran; GPU-specific languages; HPC programming models; IA; Intel MIC architecture; Intel Xeon Phi coprocessor; Intel many integrated core architecture; MPI; NVIDIA Tesla GPU-based accelerators; OpenCL; OpenMP; compute-intensive applications; data mining; graphic processing units; learning curve; parallel coprocessor; parallel kernels; scientific computing; software development; source code rewriting; Computer architecture; Conferences; Coprocessors; Data mining; Graphics processing units; Performance evaluation; Tuning; Accelerators; Data Mining; Hybrid Computing; Hybrid LIN-PACK; Molecular Dynamics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing and Simulation (HPCS), 2013 International Conference on
Conference_Location :
Helsinki
Print_ISBN :
978-1-4799-0836-3
Type :
conf
DOI :
10.1109/HPCSim.2013.6641460
Filename :
6641460
Link To Document :
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