FPGA based hardware accelerator for calculations of the parallel robot inverse kinematics

The paper presents an application of field programmable gate arrays (FPGA) to support the calculation of the inverse kinematics problem of a parallel robot. The presented robot is designed for milling by moving the spindle along a desired trajectory generated in the Cartesian space. This means that for each point of the trajectory a solution of the inverse kinematics problem is needed. The resulting sequence of data creates the joint space trajectory that must be calculated on-line at high frequency. The paper shows how to decrease the calculation time preserving required accuracy, by augmenting the arithmetic-logic unit (ALU) of a microprocessor with custom instructions. The hardware implementation of the accelerator is described and results of calculations performed in an Altera FPGA chip are analyzed.