High-speed and low-power cellular non-linear networks using single-electron tunneling technology

We investigate the use of nanoelectronic structures in cellular non-linear networks (CNN) for potential applications in future high-density and low-power CMOS-nano device hybrid circuits. We first discuss simple CNN linear architectures using single-electron tunneling (SET) transistor summing-inverter circuits, which are capacitively coupled to the inputs and outputs of nearest neighbor cells. Monte Carlo simulation results are then used to show CNN-like behavior in realizing different functionality such as shadowing. The SET-CNN circuit was optimized to operate at 1 GHz, which is a desirable feature for high-speed image processing applications. Finally, we estimate the power consumption of the SET-CNN and compare it to a state-of-the-art CMOS processor