Advanced InP DHBT process for high speed LSI circuits

Author

Urteaga, M. ; Pierson, R. ; Rowell, P. ; Choe, M. ; Mensa, D. ; Brar, B.

Author_Institution

Teledyne Sci. & Imaging Co., Thousand Oaks, CA

fYear

2008

fDate

25-29 May 2008

Firstpage

1

Lastpage

5

Abstract

We report on the development of an advanced InP double heterojunction bipolar transistor (DHBT) technology that utilizes electroplated device contacts and dielectric sidewall spacers to form a self-aligned base-emitter junction. These processes permit aggressive scaling of the transistor, while achieving high levels of yield and manufacturability. HBTs with 0.5 mum emitter junction widths have been demonstrated with an f_t/f_max of 405/390 GHz and a common-emitter breakdown voltage BV_CEO >4 V. Large-scale direct digital synthesizer (DDS) circuits have been fabricated operating at clock rates up to 24 GHz.

Keywords

III-V semiconductors; bipolar digital integrated circuits; heterojunction bipolar transistors; high-speed integrated circuits; indium compounds; large scale integration; HBTs; InP; clock rates; common-emitter breakdown voltage; dielectric sidewall spacers; double heterojunction bipolar transistor; electroplated device contacts; high speed LSI circuits; large-scale direct digital synthesizer circuit; self-aligned base-emitter junction; Circuits; DH-HEMTs; Dielectric devices; Double heterojunction bipolar transistors; Indium phosphide; Large scale integration; Large-scale systems; Manufacturing processes; Space technology; Synthesizers; InP heterojunction bipolar transistor; dielectric sidewall spacer; direct digital synthesizer; electroplated contacts; self-aligned contacts;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 2008. IPRM 2008. 20th International Conference on

Conference_Location

Versailles

ISSN

1092-8669

Print_ISBN

978-1-4244-2258-6

Electronic_ISBN

1092-8669

Type

conf

DOI

10.1109/ICIPRM.2008.4703058

Filename

4703058