DocumentCode
1816135
Title
A fast inner product processor implementation for multi-valued exponential bidirectional associative memories
Author
Wang, Chua-Chin ; Tseng, Yih-Long ; Chen, Ying-Pei ; Huang, Chenn-Jung
Author_Institution
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume
2
fYear
2002
fDate
2002
Abstract
Inner product calculations are often required in digital neural computing. The critical path of the inner product of two vectors is the carry propagation delay generated from individual product terms. In this work, a novel and high-speed realization of inner product processor for the MV-eBAM is presented in order to reduce the carry propagation delay, wherein the treatment of inner product of two vectors is given. The architecture we propose here might offer a sub-optimal solution for the digital hardware realization of the inner product computation
Keywords
CMOS digital integrated circuits; carry logic; content-addressable storage; high-speed integrated circuits; neural chips; systolic arrays; 0.6 micron; MV-eBAM; TSMC 0.6 μm 1P3M technology; carry propagation delay; critical path; digital neural computing; fast inner product processor implementation; high-speed realization; multi-valued exponential bidirectional associative memories; sub-optimal solution; systolic-like architecture; vector inner product; Application specific integrated circuits; Compressors; Computer architecture; Computer science; Councils; Data engineering; Design engineering; Equations; Hardware; Propagation delay;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location
Phoenix-Scottsdale, AZ
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010937
Filename
1010937
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