DocumentCode :
1816416
Title :
Semiconductors and power layout: new challenges for the optimization of high power converter
Author :
Pasterczyk, R. ; Martin, C. ; Schanen, J.L.
Volume :
1
fYear :
2003
fDate :
15-19 June 2003
Firstpage :
101
Abstract :
The design of a high power converter has to take into account thermal and EMC aspects. These are governed by both semiconductors and cabling imperfections. This paper illustrates the effects of these two main actors on two different aspects: paralleling components and switching performances, which includes overvoltage, losses and EMI sources.
Keywords :
busbars; cables (electric); capacitors; electromagnetic compatibility; electromagnetic interference; insulated gate bipolar transistors; losses; overvoltage; power convertors; switching convertors; EMC; EMI sources; IGBT busbar; cabling imperfections; capacitor busbar; high power converter optimization; losses; overvoltage; paralleling components; power layout; semiconductors; switching performances; thermal aspects; Capacitors; Electromagnetic compatibility; Impedance; Insulated gate bipolar transistors; Inverters; Power semiconductor switches; Solid modeling; Switching converters; Temperature measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics Specialist Conference, 2003. PESC '03. 2003 IEEE 34th Annual
ISSN :
0275-9306
Print_ISBN :
0-7803-7754-0
Type :
conf
DOI :
10.1109/PESC.2003.1218280
Filename :
1218280
Link To Document :
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