Title :
1.8V CMOS analog compander and 80 dB dynamic range
Author :
Shioda, Shinobu ; Sahoda, M. ; Aketo, M. ; Ohsawa, K. ; Fujita, Y. ; Kishigami, H. ; Shin, H. ; Ishida, M. ; Tanimoto, H. ; Iida, T.
Author_Institution :
Toshiba, Kawasaki, Japan
Abstract :
A novel analog compander for telecommunication application has been developed which has a wide dynamic range at low supply voltage. By adopting a new circuit architecture based on a MOS resistive circuit concept, a fully differential circuit configuration, and a triple threshold voltage process, a wide dynamic range of 80 dB and a low distortion of less than -70 dB have been realized at a 1.8-V supply voltage. The compander has other merits, i.e., a wide supply voltage range from 1.8 V to 5.5 V, a high tone quality due to zero delay time, and a low power consumption of 3.6 mW. This LSI has been fabricated using a 1.0-μm CMOS process. The core size of the compander is 1.68 mm2
Keywords :
CMOS analogue integrated circuits; 1 micron; 1.8 V; 3.6 mW; CMOS analog compander; LSI; MOS resistive circuit concept; cordless phone application; differential circuit configuration; high tone quality; low distortion; low power consumption; low supply voltage; telecommunication application; triple threshold voltage process; wide dynamic range; wireless phone; zero delay time; Application specific integrated circuits; CMOS analog integrated circuits; CMOS process; Capacitance; Dynamic range; Equations; Operational amplifiers; Rectifiers; Smoothing methods; Threshold voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
DOI :
10.1109/CICC.1993.590725
