Title :
A 300 MHz BiCMOS serial data transceiver
Author :
Thompson, Barry ; Lee, HaeSeung ; DeVito, Lawrence
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Abstract :
A BiCMOS circuit for serial data communication is presented. The chip has phase-locked loops for transmit frequency synthesis and receive clock recovery, serial-to-parallel and parallel-to-serial converters, and encode and decode functions. Since this is a mixed-signal design, and the transmitter and receiver operate asynchronously, many techniques are used to decrease noise coupling. A 1.2-μm BiCMOS process allows operation at speed of 300 MHz along with this high level of system integration, and the chip consumes less than 1 W from a single 5-V supply
Keywords :
transceivers; 1 W; 1.2 micron; 300 MHz; 5 V; BiCMOS serial data transceiver; ECL; decode; encode; mixed-signal ASIC; mixed-signal design; parallel-to-serial converters; phase-locked loops; receive clock recovery; serial data communication; serial-to-parallel converters; transmit frequency synthesis; BiCMOS integrated circuits; Circuit synthesis; Clocks; Data communication; Decoding; Frequency conversion; Frequency locked loops; Frequency synthesizers; Phase locked loops; Transceivers;
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
DOI :
10.1109/CICC.1993.590735
