Design Flow on a Chip - An Evolvable HW/SW Platform

Partial dynamic reconfigurability of modern FPGAs holds the potential of realizing autonomous and highly flexible systems-on-chip (SoC). Current devices can be configured with several partial bitfiles and replace particular ones on demand. But these precompiled bitfiles seriously lack flexibility: they are hardly relocatable and not adjustable. In other words, they are tied to their original functional scope and location. This paper proposes an integration of the design flow onto the reconfigurable device itself to be capable of runtime reconfiguration and adaptation through modifications on the source code level. Thus, a network-on-chip (NoC) and a Linux operating system (OS) have been combined. The design flow is integrated into a feedback control system, which runs as an application under Linux. As a consequence, an evolvable platform emerges, which is capable of adapting autonomously to its dynamic environment and changing parameters