DocumentCode :
1817358
Title :
A new cascaded multilevel inverter with reduced number of switches
Author :
Bayat, Zahra ; Babaei, Ebrahim
Author_Institution :
Dept. of Electr. Eng., Islamic Azad Univ., Ahar, Iran
fYear :
2012
fDate :
15-16 Feb. 2012
Firstpage :
416
Lastpage :
421
Abstract :
This paper propose a new topology for cascaded multilevel inverters. This structure consists of series connection of proposed basic unit blocks which are built with both unidirectional and bidirectional switches. The proposed structure has some advantages including: reduction in the number of switches and driver circuits, cost and installation area. Three algorithms for determination of dc voltage sources´ magnitudes have also been proposed. The algorithms can produce all odd and even levels at the output voltage. The proposed structure also has fewer dc voltage sources variety and less maximum blocking voltage of switches compared to conventional inverters. The capability of proposed structure in producing all odd and even output voltage levels is proved by simulation result for a 21-level inverter.
Keywords :
driver circuits; invertors; power semiconductor switches; bidirectional switches; cascaded multilevel inverter topology; dc voltage source magnitude determination; driver circuits; even output voltage levels; maximum blocking voltage; odd output voltage levels; unidirectional switches; Insulated gate bipolar transistors; Logic gates; Switches; Multilevel inverters; asymmetric multilevel; symmetric multilevel;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics and Drive Systems Technology (PEDSTC), 2012 3rd
Conference_Location :
Tehran
Print_ISBN :
978-1-4673-0111-4
Type :
conf
DOI :
10.1109/PEDSTC.2012.6183366
Filename :
6183366
Link To Document :
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