DocumentCode :
181738
Title :
Symbol-level synchronization using probability lookup-table for IDS error correction
Author :
Kaneko, H.
Author_Institution :
Dept. Comput. Sci., Tokyo Inst. of Technol., Tokyo, Japan
fYear :
2014
fDate :
26-29 Oct. 2014
Firstpage :
531
Lastpage :
535
Abstract :
Insertion/Deletion/Substitution (IDS) error correction will become important for future high-density storage devices, e.g., bit-patterned media. For IDS error correction, concatenated codings of an outer LDPC code and an inner marker code have been proposed. To improve the synchronization capability, marker decoder can employ symbol-level synchronization (SLS) with a large symbol size, while the computational time complexity of the SLS increases exponentially with the symbol size. This paper proposes an SLS using a probability lookup table to reduce the complexity. Probabilities in the table are precomputed for given channel and code parameters, and computationally intensive calculations of the SLS are replaced by table lookups. The proposed method is applicable to both single-path and multipath decodings. The bit error rate (BER) is evaluated for SLS of symbols sizes bS = 1, 2, 4, and 8 bits, and it is confirmed that larger symbol size gives lower BER.
Keywords :
error correction; parity check codes; synchronisation; table lookup; BER; IDS error correction; SLS; bit error rate; bit-patterned media; computational time complexity; concatenated codings; high density storage devices; inner marker code; marker decoder; multipath decodings; outer LDPC code; probability lookup table; single path decodings; symbol level synchronization; synchronization capability; table lookups; Bit error rate; Decoding; Encoding; Iterative decoding; Probability; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory and its Applications (ISITA), 2014 International Symposium on
Conference_Location :
Melbourne, VIC
Type :
conf
Filename :
6979900
Link To Document :
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