• DocumentCode
    1817523
  • Title

    Test of a 622 MHz hybrid module for ATM network using a 200 MHz validation station

  • Author

    Bulone, J. ; Chion, A. ; Nava, M. Dim

  • Author_Institution
    SGS-Thomson Microelectronics, Grenoble, France
  • fYear
    1993
  • fDate
    9-12 May 1993
  • Abstract
    DFT (design for testability) methods which improve the efficiency of both wafer test and hybrid module test at the service operating frequency of 622 MHz are presented. A low-cost hardware environment has been adapted to the available IMS ATS 200 validation station which operates up to 200 MHz. The global test cost of the hybrid module is decreased by eliminating the defective dice. Characterizations and measures of the chips on wafer have been correlated with those done after packaging in standard package. The link between the frequency/temperature performance in package and frequency performance on wafer at room temperature shows the correctness of this test approach
  • Keywords
    design for testability; 200 MHz; 622 MHz; 622 Mbit/s; ATM network; BiCMOS circuit; CMOS circuit; DFT; VHDL; fault simulation; frequency performance; global test cost; hybrid module; line terminator; low-cost hardware environment; package; parallel processing; service operating frequency; temperature performance; wafer test; Asynchronous transfer mode; Circuit faults; Circuit testing; Clocks; Costs; Design for testability; Frequency; Hardware; Microelectronics; Packaging;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0826-3
  • Type

    conf

  • DOI
    10.1109/CICC.1993.590778
  • Filename
    590778