DocumentCode :
1817615
Title :
Design and implementation for static Huffman encoding hardware with parallel shifting algorithm
Author :
Lee, Taeyeon ; Park, Jaehong
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Volume :
2
fYear :
2003
fDate :
19-25 Oct. 2003
Firstpage :
1314
Abstract :
This paper presents an implementation of static Huffman encoding hardware for real-time lossless compression in the ECAL of the CMS detector. The construction of the Huffman encoding hardware shows an implementation for optimizing its logic size. The number of logic gates of the parallel shift operation for the hardware is analyzed. Two kinds of implementation methods of the parallel shift operation are compared in aspect of logic size. The experiment with the hardware on a simulated ECAL environment covering 99.9999% of original distribution shows promising result with the simulation that the compression rate was 4.0039 and the maximum length of the stored data in the input buffer was 44.
Keywords :
Huffman codes; VLSI; data compression; field programmable gate arrays; flip-flops; high energy physics instrumentation computing; logic gates; parallel algorithms; parallel architectures; particle calorimetry; CMS detector; LHC; compression rate; electromagnetic calorimeter; flip-flops; logic size optimization; number of logic gates; oppositely circulating proton beams; parallel shifting algorithm; real-time compression; real-time lossless compression; static Huffman encoding hardware; Algorithm design and analysis; Buffer storage; Collision mitigation; Detectors; Encoding; Energy measurement; Hardware; Huffman coding; Lead; Logic gates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium Conference Record, 2003 IEEE
ISSN :
1082-3654
Print_ISBN :
0-7803-8257-9
Type :
conf
DOI :
10.1109/NSSMIC.2003.1351936
Filename :
1351936
Link To Document :
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