Efficient estimation of SEU effects in SRAM-based FPGAs

SRAM-based FPGAs are becoming very appealing for several applications where high dependability is a mandatory requirement. Unfortunately, the technology of SRAM-based FPGAs is very sensitive to single event upsets (SEUs) and particular concerns arise from SEUs affecting the FPGAs´ configuration memory. In this paper we propose a new method for assessing the impact of faults in the configuration memory on the FPGA dependability. The method uses static analysis, thus reducing greatly the time for performing dependability evaluation.