Title :
Design space exploration methodologies for IP-based system-on-a-chip
Author :
Ascia, Giuseppe ; Catania, Vhcenzo ; Palesi, Maurizio
Author_Institution :
Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Catania Univ., Italy
Abstract :
In this paper we present two new solutions for design space exploration of parameterized systems. The approaches use multi-objective optimisation techniques based on the concept of Pareto-optimality to determine the power/performance trade-off front for a highly parameterized system-on-a-chip for digital camera applications. The approaches used are purely heuristic and a combination of the heuristic approach with the genetic algorithm-based approach. The results obtained demonstrate the effectiveness of the approaches in terms of both validity and efficiency, measured as the number of simulations run
Keywords :
Pareto distribution; VLSI; application specific integrated circuits; circuit CAD; circuit optimisation; genetic algorithms; integrated circuit design; sensitivity analysis; IP-based SoC; IP-based system-on-a-chip; MIPS R3000 processor core; Pareto-optimality; design space exploration methodologies; digital camera applications; genetic algorithm-based approach; heuristic approach; multi-objective optimisation techniques; parameterized system-on-a-chip; parameterized systems; power/performance trade-off; Cache memory; Computational modeling; Design methodology; Digital cameras; Genetic algorithms; Pareto analysis; Sensitivity analysis; Space exploration; System-on-a-chip; Telecommunications;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1011000
