DocumentCode :
1817900
Title :
Modular T-mode neural network learning hardware implementations with analog storage capability
Author :
Linares-Barranco, Bernabe ; Sánchez-Sinencio, Edgar ; Rodríguez-Vázquez, Angel ; Huertas, José L.
Author_Institution :
Centro Nacional de Microelectron., Sevilla, Spain
Volume :
1
fYear :
1992
fDate :
7-11 Jun 1992
Firstpage :
202
Abstract :
A modular T-mode (transconductance-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a BAM network, a Hopfield network, a winner-take-all network, and a simplified ART1 network. The size of these networks can be increased by interconnecting more modular chips together. The approach is extended to include synaptic Hebbian learning as well as an analog scheme to refresh the learned weights. Experimental results of programmable and learning chips from a standard 2-μm double-metal double-poly CMOS process (MOSIS) are given
Keywords :
CMOS integrated circuits; Hebbian learning; Hopfield neural nets; analogue storage; content-addressable storage; neural chips; BAM network; Hopfield network; MOSIS; analog hardware; analog storage; bidirectional associative memory; double-metal double-poly CMOS process; learning chips; modular T-mode; modular chips; neural network learning hardware; programmable chips; simplified ART1 network; synaptic Hebbian learning; transconductance-mode; winner-take-all network; Analog circuits; Circuit synthesis; Educational institutions; Integrated circuit interconnections; Magnesium compounds; Neural network hardware; Neural networks; Neurons; Resistors; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
Type :
conf
DOI :
10.1109/IJCNN.1992.287135
Filename :
287135
Link To Document :
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