Title :
LSI implementation of pulse-output neural network with programmable synapse
Author :
Sato, Shigeo ; Yumine, Manabu ; Yama, Takayuki ; Murota, Junichi ; Nakajima, Koji ; Sawada, Yasuji
Author_Institution :
Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
Abstract :
A microchip of a neural circuit with pulse representation has been fabricated. The neuron output is a voltage pulse train. The synapse is a constant current source whose output is proportional to the duty ratio of neuron output. Membrane potential is charged by collection of synaptic currents through an RC circuit, providing analog operation similar to the biological neural system. A 4-b SRAM (static random-access memory) was used as the memory of a synaptic weight. The measured I/O characteristics of the neurons and the synapses were as expected. The ability of the network operation was demonstrated by assigning the synaptic weights as an A/D converter
Keywords :
SRAM chips; large scale integration; neural chips; 4 bit; A/D converter; LSI; RC circuit; SRAM; analog operation; constant current source; duty ratio; membrane potential; neural circuit microchip; neuron output; programmable synapse; pulse representation; pulse-output neural network; static random-access memory; synaptic currents; synaptic weight; voltage pulse train; Biological neural networks; Biomembranes; Circuit noise; Large scale integration; Neural network hardware; Neural networks; Neurons; Pulse circuits; Random access memory; Voltage;
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
DOI :
10.1109/IJCNN.1992.287140