The impact of hot-electron degradation on CMOS analog subcircuit performance

Experimental data on CMOS analog circuit degradation due to hot-electron effects are presented. Because of circuit design constraints, most MOSFETs used for analog applications are biased in the saturation region with low gate voltage. Under such operating conditions, in addition to interface states, significant numbers of hole traps are also generated inside NMOSFETs. Because acceptor-type interface states are mostly unoccupied in the saturation region, hole traps are found to have a much more significant impact on NMOSFET performance. It is demonstrated that analog subcircuit performance degradation is quite sensitive to the particular circuit design and operating conditions. Circuit performance and reliability tradeoffs are also evaluated