DocumentCode :
1818411
Title :
Estimating the power dissipation range in switched-capacitor circuits
Author :
Casinovi, Giorgio
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
2
fYear :
2002
fDate :
2002
Abstract :
This paper examines some issues involved in the estimation of the power dissipation in switched-capacitor circuits. It is shown on examples that, in general, the power dissipation depends upon the order in which the switches connected to the same clock phase are closed. As this order cannot be predicted with certainty, it is problematic to try to estimate the power dissipated by a switched-capacitor circuit in terms of a single number. A more realistic estimate of the power dissipation is to give a range of possible values. It is shown that upper and lower bounds on the power dissipation can be computed by solving a single-source shortest path problem on a directed graph. Numerical results reveal that in some cases the switching order can have a dramatic effect on the circuit´s power dissipation
Keywords :
circuit simulation; directed graphs; low-power electronics; network topology; switched capacitor networks; clock phase; directed graph; lower bounds; power dissipation range; single-source shortest path problem; switched-capacitor circuits; upper bounds; Clocks; DC-DC power converters; Operational amplifiers; Power dissipation; Power engineering computing; Switched capacitor circuits; Switches; Switching circuits; Switching converters; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1011024
Filename :
1011024
Link To Document :
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