Title :
A new neural associative memory with learning
Author :
Wu, Chung-Yu ; Lan, Jeng-Feng
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A new learnable associative neural memory has been designed, analyzed, and implemented. The chip implementation is made by using the CMOS current-mode circuits with analog current multiplier and divider. This neural memory can automatically learn and correlative things and has an on-chip ratio-type memory. It can be refreshed by reminding. An experimental three-neuron-net chip was fabricated on a 5-mm×5-mm chip. Experimental results are presented
Keywords :
content-addressable storage; neural chips; CMOS current-mode circuits; chip implementation; learnable associative neural memory; refreshed; three-neuron-net chip; Associative memory; Buildings; CMOS analog integrated circuits; CMOS memory circuits; Clocks; Equations; Mathematical model; Neural networks; Neurons; Semiconductor device modeling;
Conference_Titel :
Neural Networks, 1992. IJCNN., International Joint Conference on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0559-0
DOI :
10.1109/IJCNN.1992.287165
