An efficient image buffering and tiling algorithm for multiple channel image acquisition for space missions

Most modern imaging satellites are required to acquire images that are of high pixel resolution as well as a large swath width. These two parameters combined with usage of multiple sensor streams tend to increase the volume of data that must be transmitted to the ground. On the other hand most image compression algorithms require image data in form of small tiles. These requirements call for an efficient image buffering and tiling algorithm that can accommodate high input data rates, perform image tiling according to the requirement of compression, and preserve data continuity. This paper presents a new image buffering and tiling mechanism for image acquisition unit of imaging satellites. The presented design achieves high data throughput and is therefore capable of acquiring high resolution images from multiple sensor channels, while preventing data loss. The design has been implemented on a high speed processing unit based on field programmable gate array (FPGA) which interfaces with an external memory which is used as a FIFO buffer for writing image data in linear form and reading out in tiled form. The tile size is a run-time customizable parameter. Analysis has been performed for the effect of different parameters including image resolution in terms of ground sampling distance, and number of channels on the design performance. The design is capable of acquiring high resolution image data from multiple sensor channels while tiling out the data without data loss.