DocumentCode
1819396
Title
Implementing crest factor reduction (CFR) by offsetting digital predistortion (DPD) coefficients
Author
Braithwaite, R. Neil
Author_Institution
Powerwave Technol., Santa Ana, CA, USA
fYear
2012
fDate
3-4 Sept. 2012
Firstpage
1
Lastpage
3
Abstract
A combined approach to digital predistortion (DPD) and crest factor reduction (CFR) is proposed. The new CFR is structured similar to DPD and is implemented by introducing a steady-state offset into the DPD coefficients. The DPD and CFR coefficients are estimated using separate adaptive processes but applied to the transmission path in a common module. Results show that CFR lowers the PAPR of the predistorted signal by 5 dB, which reduces the stress on the peaking transistor in a Doherty PA.
Keywords
distortion; power amplifiers; power transistors; CFR; DPD coefficients; Doherty PA; PAPR; adaptive process separation; crest factor reduction; gain 5 dB; offsetting digital predistortion coefficients; peaking transistor; power amplifier; stress reduction; Indexes; Patents; Radio frequency; Amplifier distortion; communication system nonlinearities; power amplifier linearization; power amplifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Nonlinear Microwave and Millimetre-Wave Circuits (INMMIC), 2012 Workshop on
Conference_Location
Dublin
Print_ISBN
978-1-4673-2950-7
Electronic_ISBN
978-1-4673-2948-4
Type
conf
DOI
10.1109/INMMIC.2012.6331928
Filename
6331928
Link To Document