Reliability enhancement of CMOS SRAMs

Gate-oxide defect is the major cause of the reliability problems for CMOS ICs. The common practice for reliability enhancement is the use of extreme-voltage screening and then the high-temperature burn-in screening, where the Iddq-test approach is generally used to generate the stress vectors for the extreme-voltage screening. Note that the burn-in screening may increase the manufacturing cost ranging from 5% to 40% of the total product cost. This paper demonstrates that a conventional SRAM (static randomly access memory) may pass the above screening methods in the presence of gate-oxide defects. With a proper stress test set, the same SRAM can be fully stressed. The results of this study show that safety-critical semiconductor products can meet the reliability requirement without the use of expensive burn-in screening method if the extreme-voltage screening is properly applied.