DocumentCode :
1819823
Title :
PODEM based on static testability measures and dynamic testability measures for multiple-valued logic circuits
Author :
Kamiura, Naotake ; Isokawa, Teijiro ; Matsui, Nobuyuki
Author_Institution :
Dept. of Comput. Eng., Himeji Inst. of Technol., Japan
fYear :
2002
fDate :
2002
Firstpage :
149
Lastpage :
155
Abstract :
In this paper, PODEM for multiple-valued logic circuits is proposed. It consists of the D-propagation, implication and backtracing operation. To guide the D-propagation (or backtracing operation), observability (or controllability) measures are introduced. They are computed by simple recursive formulas, and enable us to reduce the frequency of backtracking. In addition, the scheme of exploiting static testability measures up to a certain stage of test generation and then resorting to dynamic testability measures is incorporated into PODEM. The experimental results on ternary benchmark circuits show that the above scheme is useful in generating as many test patterns as possible whilst shortening the total time required for the test generation
Keywords :
controllability; logic testing; multivalued logic; observability; D-propagation; PODEM; backtracing operation; controllability; measures dynamic testability; multiple-valued logic circuits; observability; static testability measures; ternary benchmark circuits; Benchmark testing; Circuit faults; Circuit testing; Controllability; Decision making; Frequency; Logic circuits; Logic testing; Observability; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic, 2002. ISMVL 2002. Proceedings 32nd IEEE International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-7695-1462-6
Type :
conf
DOI :
10.1109/ISMVL.2002.1011083
Filename :
1011083
Link To Document :
بازگشت