DocumentCode
1819857
Title
Methods for design and implementation of dynamic signal processing systems
Author
Bhattacharyya, Shuvra S.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Maryland at Coll. Park, College Park, MD, USA
fYear
2011
fDate
18-21 July 2011
Abstract
Summary form only given. Dynamic signal processing systems, where significant changes in functionality and computational structure must be achieved while applications are running, are becoming increasingly important as computational platforms become more powerful, and feature-sets of DSP-powered products become more sophisticated. This talk covers two new, complementary dataflow models of computation that are being developed in the Maryland DSPCAD Research Group to help address the challenges of structured design, simulation, and synthesis of dynamic signal processing systems. The first of these models, called enable-invoke dataflow (EIDF), is aimed improving the predictability of actor invocation and the efficiency with which dynamic scheduling techniques can be realized. The second model, called the dataflow schedule graph (DSG), provides a formal framework for representing and analyzing dataflow graph schedules that is rooted in formal dataflow semantics, and accommodates a wide range of schedule classes, including static, quasi-static, and dynamic schedules, as well as both sequential and parallel schedule formats. In this talk, I will present the EIDF and DSG models and discuss their potential to improve the processes by which dynamic signal processing systems are developed.
Keywords
data flow graphs; scheduling; signal processing; DSG models; DSP-powered products; EIDF models; Maryland DSPCAD Research Group; actor invocation predictability; complementary dataflow models; computational structure; dataflow schedule graph; dynamic scheduling techniques; dynamic signal processing systems; enable-invoke dataflow; formal dataflow semantics; functionality structure; quasi-static schedules; static schedules; Computational modeling; Computers; Dynamic scheduling; Educational institutions; Laboratories; Schedules; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computer Systems (SAMOS), 2011 International Conference on
Conference_Location
Samos
Print_ISBN
978-1-4577-0802-2
Electronic_ISBN
978-1-4577-0801-5
Type
conf
DOI
10.1109/SAMOS.2011.6045436
Filename
6045436
Link To Document