Modeling the grid synchronization induced negative-resistor-like behavior in the output impedance of a three-phase photovoltaic inverter

Photovoltaic power has to be converted from DC into AC in grid-connected applications. The conversion is done by using a single or three-phase inverter. Phase angle and frequency of the injected current and the grid voltage have to match to achieve unity power factor. This has been commonly accomplished by using a phase-locked-loop (PLL). The PLL has a tendency to make the output impedance of the inverter to appear as a negative resistor which can introduce harmonics in the grid current or even make the inverter-grid interface unstable. This paper presents a general small-signal model of a PV inverter in the synchronous reference frame which includes the PLL. Due to the negative resistance, the inverter can become unstable when the grid has high inductance. The derived small-signal model can be used to predict the exact conditions where the instability will take place by utilizing the impedance ratio and Nyquist stability criterion.