DocumentCode
1819975
Title
Fairness for broadband integrated switch architectures under backpressure mechanisms
Author
Badran, Hosein F. ; Mouftah, H.T.
Author_Institution
Dept. of Electr. Eng., Queen´´s Univ., Kingston, Ont., Canada
fYear
1991
fDate
23-26 Jun 1991
Firstpage
1033
Abstract
The unfairness problem associated with the classical cyclic service mechanism in broadband switches with input and output buffering and backpressure control is explained. Three alternative service or selection mechanisms are proposed and are compared from the point of view of fairness, implementation complexity, and cell loss performance. It is found that one policy offers the best performance in terms of fairness and cell loss rate, at the expense of being the most difficult to implement. Another policy is a promising compromise between performance and implementation complexity and does not exhibit any serious unfairness problems. The performance of these policies is also investigated under two different nonuniform traffic patterns, known to seriously degrade the performance of multistage interconnection networks
Keywords
queueing theory; time division multiplexing; ATM switches; backpressure control; broadband integrated switch architectures; cell loss performance; cyclic service mechanism; implementation complexity; input buffering; nonuniform traffic patterns; output buffering; queueing theory; unfairness problem; Asynchronous transfer mode; B-ISDN; Bandwidth; Buffer overflow; Channel allocation; Delay; Fabrics; Switches; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, 1991. ICC '91, Conference Record. IEEE International Conference on
Conference_Location
Denver, CO
Print_ISBN
0-7803-0006-8
Type
conf
DOI
10.1109/ICC.1991.162511
Filename
162511
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