30 dBm P1dB and 4 dB insertion losses optimized 4G antenna tuner fully integrated in a 130 nm CMOS SOI technology

Author

Sonnerat, F. ; Pilard, Romain ; Gianesello, Frederic ; Jan, Sen ; Le Pennec, François ; Person, C. ; Durand, C. ; Gloria, Daniel

Author_Institution

Silicon Technol. Dev., STMicroelectron., Crolles, France

fYear

2013

fDate

20-20 Jan. 2013

Firstpage

37

Lastpage

39

Abstract

In order to counteract the antenna impedance mismatch due to its interaction with the environment, one solution is to add an antenna tuner between the front-end module and the antenna. In this paper, we present the large signal measurement of a 4G integrated antenna tuner, previously presented in [1]. The tuner has been realized in STMicroelectronics 130 nm CMOS SOI technology and operates between 2500 MHz and 2690 MHz. We also propose some improvement to reduce the design parasitics, illustrated by the small signal performances of the optimized circuit.

Keywords

4G mobile communication; CMOS integrated circuits; Long Term Evolution; UHF antennas; impedance matching; silicon-on-insulator; tuning; 4G integrated antenna tuner; CMOS SOI technology; antenna impedance mismatch; design parasitics; frequency 2500 MHz to 2690 MHz; loss 4 dB; size 130 nm; Antenna measurements; Antennas; CMOS integrated circuits; Insertion loss; Loss measurement; Metals; Tuners; 4G-LTE applications; CMOS SOI technology; Embedded antenna tuner; large signal measurement; small signal measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Amplifiers for Wireless and Radio Applications (PAWR), 2013 IEEE Topical Conference on

Conference_Location

Santa Clara, CA

Print_ISBN

978-1-4673-2915-6

Electronic_ISBN

978-1-4673-2931-6

Type

conf

DOI

10.1109/PAWR.2013.6490181

Filename

6490181