• DocumentCode
    1820774
  • Title

    Spectrum-based BIST in complex SOCs

  • Author

    Kasturirangan, Ganapathy ; Hsiao, Michael S.

  • Author_Institution
    Intel Corp., Hillsboro, OR, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    111
  • Lastpage
    116
  • Abstract
    Presents a spectral built-in-self-test (BIST) for a system-on-a-chip (SOC) environment. Test vectors are generated using the spectral properties of the embedded cores. Because some embedded cores may not have direct connections to the embedded TPG, it would be necessary to test them via other cores. As a result, testing such (cascaded) cores requires considerations on the spectral characteristics of the predecessor and successor cores. Matching spectral characteristics between the outputs of the predecessor core and dominant inputs of the successor core allows the successor core to be more testable. Experimental results for the spectral BIST showed that significantly more faults can be detected using spectral patterns than by conventional weighted random BIST technique.
  • Keywords
    application specific integrated circuits; built-in self test; cascade networks; integrated circuit testing; logic testing; spectral analysis; benchmark circuits; cascaded cores; complex SOCs; embedded cores; predecessor cores; spectral patterns; spectral properties; spectrum-based BIST; successor cores; Built-in self-test;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
  • Print_ISBN
    0-7695-1570-3
  • Type

    conf

  • DOI
    10.1109/VTS.2002.1011120
  • Filename
    1011120