Title :
An ASIC design for real-time image processing in industrial applications
Author :
Valle, M. ; Nateri, G. ; Caviglia, D.D. ; Bisio, G.M. ; Briozzo, L.
Author_Institution :
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
Abstract :
In this paper we present the design of an ASIC chip for real-time image processing in industrial applications. The chip is a module of a system for the automatic surface inspection of mechanical parts: it implements the feed-forward phase of a neural network model (multi-layer perceptron with local connections) tuned to the specific application. The design has been performed in 0.7 μm CMOS technology using an approach based on high level transformations of the VHDL specifications. Special emphasis was given to achieve real-time speed. As a result, the architecture is based on a deep pipeline and the performance is beyond the real-time specifications
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; automatic optical inspection; circuit CAD; digital signal processing chips; image processing equipment; image recognition; integrated circuit design; logic CAD; multilayer perceptrons; neural chips; pipeline processing; real-time systems; 0.7 micron; ASIC chip; ASIC design; CMOS technology; VHDL specifications; automatic surface inspection; deep pipeline; feed-forward phase; high level transformations; industrial applications; local connections; mechanical parts; multi-layer perceptron; neural network model; real-time image processing; Application specific integrated circuits; CMOS technology; Feedforward neural networks; Feedforward systems; Image processing; Inspection; Multi-layer neural network; Multilayer perceptrons; Neural networks; Semiconductor device modeling;
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
DOI :
10.1109/EDTC.1995.470367
