Timing jitter measurement of 10 Gbps bit clock signals using frequency division

Author

Yamaguchi, Takahiro J. ; Soma, Mani ; Malarsie, Louis ; Ishida, Masahiro ; Musha, Hirobumi

Author_Institution

Advantest Labs. Ltd., Miyagi, Japan

fYear

2002

fDate

2002

Firstpage

207

Lastpage

212

Abstract

This paper presents a new method for measuring timing jitter of the bit clock signal in telecommunication devices operating at 10 Gbps. The method uses a divide-by-M circuit to reduce the frequency and the number of clock samples, and applies the Hilbert transform to measure the timing jitter The theory for this frequency division method is supported by the experimental data from a serializer-deserializer device.

Keywords

Hilbert transforms; clocks; frequency dividers; phase detectors; phase locked loops; signal sampling; telecommunication equipment testing; timing jitter; 10 Gbit/s; 10 Gbps bit clock signals; Hilbert transform; bit clock generator circuit; clock samples; divide-by-M circuit; frequency division method; high-frequency clocks; phase-frequency detector; phase-locked loop; sampling theory; serializer-deserializer device; telecommunication devices; timing jitter measurement; Circuits; Clocks; Frequency conversion; Frequency measurement; Laboratories; Phase frequency detector; Phase locked loops; Phase measurement; Terminology; Timing jitter;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE

Print_ISBN

0-7695-1570-3

Type

conf

DOI

10.1109/VTS.2002.1011140

Filename

1011140