DocumentCode :
1821612
Title :
Speeding-up IDDQ measurements
Author :
Thibeault, C.
Author_Institution :
Dept. of Electr. Eng., Ecole de Technologie Superieure, Montreal, Que., Canada
fYear :
2002
fDate :
2002
Firstpage :
295
Lastpage :
301
Abstract :
The purpose of this paper is to introduce a new IDDQ measurement technique based on active successive approximations, named ASA-IDDQ. This technique has unique features allowing to speed-up IDDQ measurement. Experimental results suggests that a significant speed-up factor can be obtained over the QuiC-Mon technique.
Keywords :
VLSI; electric current measurement; fault diagnosis; integrated circuit testing; ASA IDDQ; IDDQ measurement; QuiC-Mon technique; approximations; statistics; test speed; Computer architecture; Delay effects; Dynamic range; Prototypes; Steady-state; Switches; Testing; Velocity measurement; Very large scale integration; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN :
0-7695-1570-3
Type :
conf
DOI :
10.1109/VTS.2002.1011157
Filename :
1011157
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1821612
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