DocumentCode :
1821818
Title :
Run-time consistency checking in discrete simulation models
Author :
Fleurkens, J.W.G. ; Van, C. A J Eijk ; Jess, J.A.G.
Author_Institution :
Design Autom. Sect., Eindhoven Univ. of Technol., Netherlands
fYear :
1995
fDate :
6-9 Mar 1995
Firstpage :
223
Lastpage :
227
Abstract :
A new and efficient method is presented to improve the validation capabilities of a discrete event simulator. Discrete event monitors are introduced as a means to analyse event traces during a simulation run. This facilitates the defection and location of erroneous behaviour in a design specification. Furthermore, a specification language for discrete event monitors is described and it is shown how this language facilitates the integration of other specification methods. Experimental results are presented to demonstrate the efficiency of the proposed techniques
Keywords :
circuit CAD; circuit analysis computing; discrete event simulation; integrated circuit design; specification languages; IC design; design productivity; discrete event monitors; discrete event simulator; discrete simulation models; erroneous behaviour; event traces; run-time consistency checking; specification language; specification methods; Analytical models; Design automation; Discrete event simulation; Formal verification; Hardware; Productivity; Runtime; Software systems; Specification languages; Unified modeling language;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
Type :
conf
DOI :
10.1109/EDTC.1995.470399
Filename :
470399
Link To Document :
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