DocumentCode :
1821947
Title :
Testing static and dynamic faults in random access memories
Author :
Hamdioui, Said ; Al-Ars, Zaid ; Van de Goor, Ad J.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fYear :
2002
fDate :
2002
Firstpage :
395
Lastpage :
400
Abstract :
The ever increasing trend to reduce DPM levels of memories requires tests with very high fault coverage. The important class of dynamic faults, therefore, cannot be ignored any more. It is shown that conventional memory tests constructed to detect static faulty behavior of a specific defect do not necessarily detect the dynamic faulty behavior. Indeed, dynamic faulty behavior can take place in the absence of static faults. The paper presents new memory tests derived to target the dynamic fault class.
Keywords :
fault diagnosis; fault simulation; integrated circuit testing; random-access storage; DPM levels; March notation; dynamic fault behavior; dynamic fault testing; fault coverage; fault models; fault primitives; memory tests; random access memories; static fault testing; Analytical models; Costs; Educational institutions; Fault detection; Information technology; Logic testing; Performance evaluation; SPICE; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN :
0-7695-1570-3
Type :
conf
DOI :
10.1109/VTS.2002.1011170
Filename :
1011170
Link To Document :
بازگشت