DocumentCode :
1822348
Title :
Soft DSP Design Methodology of Face Recognition System on Nios II Embedded Platform
Author :
Shih, Hao-Chung ; Ho, Chian C.
Author_Institution :
Dept. of Electr. Eng., Nat. Yunlin Univ. of Sci. & Technol., Douliou, Taiwan
Volume :
2
fYear :
2009
fDate :
18-20 Aug. 2009
Firstpage :
753
Lastpage :
756
Abstract :
Based on the emerging and significant soft DSP technique, this paper develops soft DSP of face recognition to boost face identification (FaceID) embedded system without extra coprocessor cost and power consumption. This paper not only illustrates the HW/SW codesign methodology of SSoftoft dSP of face recognition in detail, but also gives a step-by-step implementation tutorial on Nios II embedded platform. The measurement results of soft DSP of face recognition can verify soft DSP technique easily achieves faster processing performance than the pure SW technique. Soft DSP technique has been entitled to be the development mainstream of FaceID embedded system field.
Keywords :
digital signal processing chips; embedded systems; face recognition; hardware-software codesign; HW-SW codesign methodology; Nios II embedded platform; face recognition system; soft DSP design methodology; Biometrics; Coprocessors; Design methodology; Digital signal processing; Embedded system; Energy consumption; Face recognition; Libraries; Signal processing algorithms; Statistical analysis; Soft DSP; embedded platform; face recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Assurance and Security, 2009. IAS '09. Fifth International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-0-7695-3744-3
Type :
conf
DOI :
10.1109/IAS.2009.296
Filename :
5284119
Link To Document :
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