• DocumentCode
    1822544
  • Title

    A design-for-test structure for optimising analogue and mixed signal IC test

  • Author

    Bratt, A.H. ; Richardson, A.M.D. ; Harvey, R.J.A. ; Dorey, A.P.

  • Author_Institution
    Dept. of Eng., Lancaster Univ., UK
  • fYear
    1995
  • fDate
    6-9 Mar 1995
  • Firstpage
    24
  • Lastpage
    33
  • Abstract
    A new Design-for-Test (DfT) structure based on a configurable operational amplifier, referred to as a “swap amp” is presented that allows access to embedded analogue blocks. The structure has minimal impact on circuit performance and has been evaluated on a custom designed Phase Locked Loop (PLL) structure. A test chip containing faulty and fault free versions of this PLL structure, with and without DfT modifications, has been fabricated and an evaluation of this DfT scheme based on the swap-amp structure carried out. It is shown that for embedded analogue blocks, the DfT strategy can not only improve and simplify analogue and mixed signal IC test, but can also be used for diagnostics
  • Keywords
    design for testability; integrated circuit testing; mixed analogue-digital integrated circuits; operational amplifiers; phase locked loops; DfT modifications; configurable operational amplifier; custom designed phase locked loop; design-for-test structure; diagnostics; embedded analogue blocks; mixed signal IC test; swap amp; Analog integrated circuits; Built-in self-test; Circuit faults; Circuit testing; Design for testability; Design optimization; Filters; Integrated circuit testing; Phase locked loops; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-7039-8
  • Type

    conf

  • DOI
    10.1109/EDTC.1995.470424
  • Filename
    470424