DocumentCode
1822593
Title
Eliminating the Z-Buffer bottleneck
Author
Knittel, Gunter ; Schilling, Andreas
Author_Institution
WSI/GRIS, Tubingen Univ., Germany
fYear
1995
fDate
6-9 Mar 1995
Firstpage
12
Lastpage
16
Abstract
We present a solution to one of the fundamental problems in computer graphics, the hidden surface removal. In most 3D-graphics systems the hidden surface removal is done using the Z-Buffer algorithm. This method, however, requires one to perform a read-modify-write memory access for each visible pixel, which represents a severe performance limit. We introduce a novel SRAM cell, which incorporates the needed logical units to perform the Z-Buffer algorithm on its own. Placed into the page register of conventional DRAMs, almost any pixel rate can be achieved
Keywords
SRAM chips; buffer storage; computer graphics; hidden feature removal; memory architecture; SRAM cell; Z-buffer bottleneck; computer graphics; hidden surface removal; logical units; page register; pixel rate; Application software; Bit rate; Buffer storage; Computer displays; Computer graphics; Costs; Large screen displays; Logic; Random access memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location
Paris
Print_ISBN
0-8186-7039-8
Type
conf
DOI
10.1109/EDTC.1995.470426
Filename
470426
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